layer[2]

Hardware

To build the hardware just navigate to xilinx/ and enter

make build

Once completed, you can upload it onto your Starter Kit with

make upload

This just loads it directly onto your Spartan-3E. If you wish to load the design to the Plattform Flash type

make prom

If nothing shows up on the display, you might accidetally erased the CPLD. Start the iMPACT GUI and upload "xilinx/CPLD_bypass_logic.jed" to the CPLD.

void Bootloader

Building the Bootloader

The source for the 'void Bootloader' is located at sw/void. You can build it with

make standalone

This will create the binary and translates it into the VHDL memory file sw/bin/data.vhd. You need to rebuild the hardware subsequently.

Configuring 'upload.py'

The serial port number of the upload script sw/common/upload.py needs to be adjusted.

34 port = 4, # 'COM5',

Uploading images

Start layer[2] and select 'Upload image ...'. You can navigate with the 'ARROW UP' and 'ARROW DOWN' keys. The system now waits for some incomming serial transmission.
In cygwin switch to the directory where sw/tennmino/ resides and type

make upload

This will build and upload the application. If everything went well, you'll see the 'void Bootloader' start-up screen again.

If you select 'View memory contents ...', you can monitor the contents of the StrataFlash and the DDR. 'ARROW UP' and 'ARROW DOWN' increases or decreases the starting address of the displayed memory contents respectively. Press 'ESC' to return.

With 'Start ...' the contents of the StrataFlash will be loaded to the DDR and the system starts the execution of the uploaded program.